q?v~zy??q?v?_ra]{|?aqcabeq HFS12N65U bv dss = 650 v r ds(on) typ = 0.67
i d =12a ? originative new design ? superior avalanche rugged technology ? robust gate oxide technology ? very low intrinsic capacitances ? excellent switching characteristics ? unrivalled gate charge : 42 nc (typ.) ? extended safe operating area ? lower r ds(on) : 0.67
7 \ s # 9 gs =10v ? 100% avalanche tested features HFS12N65U 650v n-channel mosfet 1.gate 2. drain 3. source 2 1 3 to-220f absolute maximum ratings t c =25 e unless otherwise specified symbol parameter value units v dss drain-source voltage 650 v i d drain current ? continuous (t c = 25 e ) 12* a drain current ? continuous (t c = 100 e ) 7.4* a i dm drain current ? pulsed (note 1) 48* a v gs gate-source voltage 30 v e as single pulsed avalanche energy (note 2) 840 mj i ar avalanche current (note 1) 12 a e ar repetitive avalanche energy (note 1) 5.2 mj dv/dt peak diode recovery dv/dt (note 3) 4.5 v/ns p d power dissipation (t c = 25 e ) - derate above 25 e 52 w 0.42 w/ e t j , t stg operating and storage temperature range -55 to +150 e t l maximum lead temperature for soldering purposes, 1/8? from case for 5 seconds 300 e thermal resistance characteristics symbol parameter typ. max. units r jc junction-to-case -- 2.4 e /w r ja junction-to-ambient -- 62.5 * drain current limited by maximum junction temperature july 2014
q?v~zy??q?v?_ra]{|?aqcabeq HFS12N65U package marking and odering information device marking week marking package packing quantity rohs status HFS12N65U ywwx to-220f tube 50 pb free HFS12N65U ywwxg to-220f tube 50 halogen free notes ; 1. repetitive rating : pulse width limited by maximum junction temperature 2. l=10.3mh, i as =12a, v dd =50v, r g =25 : , starting t j =25 q c 3. i sd ? 12a, di/dt ? $ v , v dd ? % 9 dss , starting t j =25 q c 4. pulse test : pulse width ? v ' x w \ & \ f o h ? 5. essentially independent of operating temperature electrical characteristics t c =25 q c unless otherwise specified i s continuous source-drain diode forward current -- -- 12 a i sm pulsed source-drain diode forward current -- -- 48 v sd source-drain diode forward voltage i s = 12 a, v gs = 0 v -- -- 1.4 v trr reverse recovery time i s = 12 a, v gs = 0 v di f /dt = 100 a/ v (note 4) -- 430 -- qrr reverse recovery charge -- 4.0 -- & symbol parameter test conditions min typ max units v gs gate threshold voltage v ds = v gs , i d = 250 3 2.5 -- 4.5 v r ds(on) static drain-source on-resistance v gs = 10 v, i d = 6 a -- 0.67 0.78 ? on characteristics bv dss drain-source breakdown voltage v gs = 0 v, i d = 250 3 650 -- -- v i dss zero gate voltage drain current v ds = 650 v, v gs = 0 v -- -- 1 3 v ds = 520 v, t c = 125 e -- -- 10 3 i gss gate-body leakage current v gs = 30 v, v ds = 0 v -- -- 100 2 off characteristics c iss input capacitance v ds = 25 v, v gs = 0 v, f = 1.0 mhz -- 2100 2750 ? c oss output capacitance -- 170 220 ? c rss reverse transfer capacitance -- 11 14.5 ? dynamic characteristics t d(on) turn-on time v ds = 325 v, i d = 12 a, r g = 25 ? (note 4,5) -- 55 120 t r turn-on rise time -- 45 100 t d(off) turn-off delay time -- 145 300 t f turn-off fall time -- 25 60 q g total gate charge v ds = 520v, i d = 12 a, v gs = 10 v (note 4,5) -- 42 55 nc q gs gate-source charge -- 12 -- nc q gd gate-drain charge -- 12 -- nc switching characteristics source-drain diode maximum ratings and characteristics
q?v~zy??q?v?_ra]{|?aqcabeq HFS12N65U typical characteristics figure 1. on region characteristics figure 2. transfer characteristics figure 3. on resistance variation vs drain current and gate voltage figure 4. body diode forward voltage variation with source current and temperature figure 5. capacitance characteristics figur e 6. gate charge characteristics 10 0 10 1 10 0 10 1 10 2 v gs top : 15.0 v 10.0 v 8.0 v 7.0 v 6.0 v 5.5 v 5.0 v bottom : 4.5 v * notes : 1. 300us pulse test 2. t c = 25 o c i d , drain current [a] v ds , drain-source voltage [v] 10 -1 10 0 10 1 0 500 1000 1500 2000 2500 3000 c iss = c gs + c gd (c ds = shorted) c oss = c ds + c gd c rss = c gd * note ; 1. v gs = 0 v 2. f = 1 mhz c rss c oss c iss capacitances [pf] v ds , drain-source voltage [v] 246810 0.1 1 10 -55 o c 25 o c * notes : 1. v ds = 30v 2. 300us pulse test v gs , gate-source voltage [v] i d , drain current [a] 150 o c 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0.1 1 10 25 o c * notes : 1. v gs = 0v 2. 300us pulse test v sd , source-drain voltage [v] i dr , reverse drain current [a] 150 o c 0 4 8 1216202428 0.4 0.6 0.8 1.0 1.2 v gs = 20v v gs = 10v
note : t j = 25 o c r ds(on) [ : ], drain-source on-resistance i d , drain current [a] 0 1020304050 0 2 4 6 8 10 12 v ds = 325v v ds = 130v v ds = 520v
note : i d = 12a v gs , gate-source voltage [v] q g , total gate charge [nc]
q?v~zy??q?v?_ra]{|?aqcabeq HFS12N65U typical characteristics figure 7. breakdown voltage variation vs temperature figure 8. on-resistance variation vs temperature figure 9. maximum safe operating area figure 10. maximum drain current vs case temperature figure 11. transient thermal response curve -100 -50 0 50 100 150 200 0.8 0.9 1.0 1.1 1.2
note : 1. v gs = 0 v 2. i d = 250 p a bv dss , (normalized) drain-source breakdown voltage t j , junction temperature [ o c] t 2 t 1 p dm 25 50 75 100 125 150 0 3 6 9 12 i d , drain current [a] t c , case temperature [ o c] -100 -50 0 50 100 150 200 0.0 0.5 1.0 1.5 2.0 2.5 3.0
note : 1. v gs = 10 v 2. i d = 6 a r ds(on) , (normalized) drain-source on-resistance t j , junction temperature [ o c] 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 -2 10 -1 10 0 * notes : 1. z t jc (t) = 2.4 o c/w max. 2. duty factor, d=t 1 /t 2 3. t jm - t c = p dm * z t jc (t) single pulse d=0.5 0.02 0.2 0.05 0.1 0.01 z t jc (t), thermal response t 1 , square wave pulse duration [sec] 10 0 10 1 10 2 10 3 10 -2 10 -1 10 0 10 1 10 2 10 p s 100 ms dc 10 ms 1 ms 100 p s operation in this area is limited by r ds(on) * notes : 1. t c = 25 o c 2. t j = 150 o c 3. single pulse i d , drain current [a] v ds , drain-source voltage [v]
q?v~zy??q?v?_ra]{|?aqcabeq HFS12N65U fig 12. gate charge test circuit & waveform fig 13. resistive switching test circuit & waveforms fig 14. unclamped inductive switching test circuit & waveforms e as =l l i as 2 ---- 2 1 -------------------- bv dss -- v dd bv dss v in v ds 10% 90% t d(on) t r t on t off t d(off) t f charge v gs 10v q g q gs q gd v dd v ds bv dss t p v dd i as v ds (t) i d (t) time v dd ( 0.5 rated v ds ) 10v v ds r l dut r g 3ma v gs dut v ds 300nf .
200nf 12v same type as dut 10v dut r g l i d
q?v~zy??q?v?_ra]{|?aqcabeq HFS12N65U fig 15. peak diode recovery dv/dt test circuit & waveforms dut v ds + _ driver r g same type as dut v gs ? dv/dt controlled by r g ?i s controlled by pulse period v dd l i s 10v v gs ( driver ) i s ( dut ) v ds ( dut ) v dd body diode forward voltage drop v f i fm , body diode forward current body diode reverse current i rm body diode recovery dv/dt di/dt d = gate pulse width gate pulse period --------------------------
q?v~zy??q?v?_ra]{|?aqcabeq HFS12N65U package dimension 0.70 0.20 0.20 3.30 0.20 15.87 0.20 12.42 0.20 2.54typ 6.68 0.20 0.80 0.20 1.47max 2.54 0.20 0.20 0.50 0.20 2.76 0.20 2.54typ 9.75 0.20 3 0.20 { v t y y w m g
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